D a t a S h e e t
Figure 11, “Read Operation Timings,”
Added tCEH to figure.
Figure 12, “Page Read Timings,”
Change A1-A0 to A2-A0.
Erase and Program Operations
Updated tWHWH1 and tWHWH2 with values.
Figure 16, “Chip/Sector Erase Operation Timings,”
Changed 5555h to 55h and 3030h to 30h.
Figure 17, “Data# Polling Timings (During Embedded Algorithms),”
Removed DQ15 and DQ14-DQ8
Added Note 2
Figure 18, “Toggle Bit Timings (During Embedded Algorithms),”
Changed DQ6 & DQ14/DQ2 & DQ10 to DQ2 and DQ6.
Alternate CE# Controlled Erase and Program Operations
Updated tWHWH1 and tWHWH2 with values.
Latchup Characteristics
Removed Table.
Erase and Programming Performance
Updated TBD with values.
Updated Note 1 and 2.
Physical Dimensions
Removed the reverse pinout information and note 3.
Revision A5 (September 29, 2004)
Performance Characteristics
Removed 80 ns.
Product Selector Guide
Updated values in tables.
Ordering Information
Created a family table.
Operating Ranges
Updated VIO.
CMOS Characteristics
Created a family table.
Read-Only Operations
Created a family table.
Hardware Reset (RESET#)
Created a family table.
Figure 13, “Reset Timings,”
Added tRH to waveform.
Erase and Program Operations
Created a family table.
S29GL-N_00_B3 October 13, 2006
S29GL-N MirrorBit™ Flash Family
95
SPANSION [ SPANSION ]
