A d v a n c e I n f o r m a t i o n
AC Characteristics
Hardware Reset (RESET#)
Parameter
JEDEC
Std
Description
Test Setup
Max
All Speed Options
Unit
RESET#Pin Low (During Embedded Algorithms)
to Read or Write (See Note)
tREADY
20
µs
RESET# Pin Low (NOT During Embedded
Algorithms) to Read or Write (See Note)
tREADY
Max
500
ns
tRP
tRH
tRPD
tRB
RESET# Pulse Width
Min
Min
Min
Min
500
50
20
0
ns
ns
µs
ns
RESET# High Time Before Read (See Note)
RESET# Low to Standby Mode
RY/BY# Recovery Time
Note: Not 100% tested.
RY/BY#
CE#, OE#
RESET#
tRH
tRP
tReady
Reset Timings NOT during Embedded Algorithms
Reset Timings during Embedded Algorithms
tReady
RY/BY#
tRB
CE#, OE#
RESET#
tRH
tRP
Figure 15. RESET# Timings
June 13, 2005 S29AL032D_00_A3
S29AL032D
51
SPANSION [ SPANSION ]
