D A T A S H E E T
AC CHARACTERISTICS
Program Command Sequence (last two cycles)
Read Status Data (last two cycles)
tAS
tWC
Addresses
555h
PA
PA
PA
tAH
CE#
OE#
tCH
tWHWH1
tWP
WE#
tWPH
tCS
tDS
tDH
PD
DOUT
A0h
Status
Data
VCC
tVCS
Note: PA = program address, PD = program data, DOUT is the true data at the program address.
Figure 9. Program Operation Timings
Erase Command Sequence (last two cycles)
Read Status Data
VA
tAS
tWC
VA
Addresses
CE#
2AAh
SA
555h for chip erase
tAH
tCH
OE#
tWP
WE#
tWPH
tWHWH2
tCS
tDS
tDH
In
Data
VCC
Complete
55h
30h
Progress
10 for Chip Erase
tVCS
Note: SA = sector address (for Sector Erase), VA = Valid Address for reading status data (see “Write Operation Status”).
Figure 10. Chip/Sector Erase Operation Timings
October 31, 2006 Am29F010B_00_C7
Am29F010B
23
SPANSION [ SPANSION ]
