欢迎访问ic37.com |
会员登录 免费注册
发布采购

AM29F010B-90JF 参数 Datasheet PDF下载

AM29F010B-90JF图片预览
型号: AM29F010B-90JF
PDF下载: 下载PDF文件 查看货源
内容描述: 1兆位( 128千×8位) CMOS 5.0伏只,统一部门快闪记忆体 [1 Megabit (128 K x 8-bit) CMOS 5.0 Volt-only, Uniform Sector Flash Memory]
分类和应用:
文件页数/大小: 33 页 / 1007 K
品牌: SPANSION [ SPANSION ]
 浏览型号AM29F010B-90JF的Datasheet PDF文件第24页浏览型号AM29F010B-90JF的Datasheet PDF文件第25页浏览型号AM29F010B-90JF的Datasheet PDF文件第26页浏览型号AM29F010B-90JF的Datasheet PDF文件第27页浏览型号AM29F010B-90JF的Datasheet PDF文件第29页浏览型号AM29F010B-90JF的Datasheet PDF文件第30页浏览型号AM29F010B-90JF的Datasheet PDF文件第31页浏览型号AM29F010B-90JF的Datasheet PDF文件第32页  
D A T A S H E E T  
AC CHARACTERISTICS  
555 for program  
PA for program  
2AA for erase  
SA for sector erase  
555 for chip erase  
Data# Polling  
Addresses  
PA  
tWC  
tWH  
tAS  
tAH  
WE#  
OE#  
tGHEL  
tWHWH1 or 2  
tCP  
CE#  
Data  
tWS  
tCPH  
tDS  
tDH  
DQ7#  
DOUT  
A0 for program  
55 for erase  
PD for program  
30 for sector erase  
10 for chip erase  
Notes:  
1. PA = Program Address, PD = Program Data, SA = Sector Address, DQ7# = Complement of Data Input, DOUT = Array Data.  
2. Figure indicates the last two bus cycles of the command sequence.  
Figure 13. Alternate CE# Controlled Write Operation Timings  
ERASE AND PROGRAMMING PERFORMANCE  
Limits  
Parameter  
Typ (Note 1)  
Max (Note 2)  
Unit  
Comments  
Excludes 00h programming prior to  
erasure (Note 4)  
Chip/Sector Erase Time  
1.0  
15  
sec  
Byte Programming Time  
7
300  
µs  
Excludes system-level overhead  
(Note 5)  
Chip Programming Time (Note 3)  
0.9  
6.25  
sec  
Notes:  
1. Typical program and erase times assume the following conditions: 25°C, 5.0 V VCC, 1 million cycles. Additionally,  
programming typicals assume checkerboard pattern.  
2. Under worst case conditions of 90°C, VCC = 4.5 V (4.75 V for -45), 100,000 cycles.  
3. The typical chip programming time is considerably less than the maximum chip programming time listed, since most bytes  
program faster than the maximum byte program time listed. If the maximum byte program time given is exceeded, only then  
does the device set DQ5 = 1. See the section on DQ5 for further information.  
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.  
5. System-level overhead is the time required to execute the four-bus-cycle command sequence for programming. See Table 4  
for further information on command definitions.  
6. The device has a minimum guaranteed erase cycle endurance of 1 million cycles.  
26  
Am29F010B  
Am29F010B_00_C7 October 31, 2006