欢迎访问ic37.com |
会员登录 免费注册
发布采购

AM29DL640H70WHI 参数 Datasheet PDF下载

AM29DL640H70WHI图片预览
型号: AM29DL640H70WHI
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位(8M ×8位/ 4米x 16位) CMOS 3.0伏只,同步读/写闪存 [64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory]
分类和应用: 闪存存储内存集成电路
文件页数/大小: 54 页 / 1243 K
品牌: SPANSION [ SPANSION ]
 浏览型号AM29DL640H70WHI的Datasheet PDF文件第7页浏览型号AM29DL640H70WHI的Datasheet PDF文件第8页浏览型号AM29DL640H70WHI的Datasheet PDF文件第9页浏览型号AM29DL640H70WHI的Datasheet PDF文件第10页浏览型号AM29DL640H70WHI的Datasheet PDF文件第12页浏览型号AM29DL640H70WHI的Datasheet PDF文件第13页浏览型号AM29DL640H70WHI的Datasheet PDF文件第14页浏览型号AM29DL640H70WHI的Datasheet PDF文件第15页  
addresses on the device address inputs produce valid  
data on the device data outputs. Each bank remains  
enabled for read access until the command register  
contents are altered.  
as required by the Unlock Bypass mode. Removing  
VHH from the WP#/ACC pin returns the device to nor-  
mal operation. Note that VHH must not be asserted on  
WP#/ACC for operations other than accelerated pro-  
gramming, or device damage may result. In addition,  
the WP#/ACC pin must not be left floating or uncon-  
nected; inconsistent behavior of the device may result.  
See “Write Protect (WP#)” on page 15 for related infor-  
mation.  
Refer to the AC Read-Only Operations table for timing  
specifications and to Figure 14 for the timing diagram.  
ICC1 in the DC Characteristics table represents the ac-  
tive current specification for reading array data.  
Writing Commands/Command Sequences  
Autoselect Functions  
To write a command or command sequence (which in-  
cludes programming data to the device and erasing  
sectors of memory), the system must drive WE# and  
CE# to VIL, and OE# to VIH.  
If the system writes the autoselect command se-  
quence, the device enters the autoselect mode. The  
system can then read autoselect codes from the inter-  
nal register (which is separate from the memory array)  
on DQ15–DQ0. Standard read cycle timings apply in  
this mode. Refer to the Autoselect Mode and Autose-  
lect Command Sequence sections for more informa-  
tion.  
For program operations, the BYTE# pin determines  
whether the device accepts program data in bytes or  
words. Refer to “Word/Byte Configuration” for more in-  
formation.  
The device features an Unlock Bypass mode to facili-  
tate faster programming. Once a bank enters the Un-  
lock Bypass mode, only two write cycles are required  
to program a word or byte, instead of four. The  
“Byte/Word Program Command Sequence” section  
has details on programming data to the device using  
both standard and Unlock Bypass command se-  
quences.  
Simultaneous Read/Write Operations with  
Zero Latency  
This device is capable of reading data from one bank  
of memory while programming or erasing in the other  
bank of memory. An erase operation may also be sus-  
pended to read from or program to another location  
within the same bank (except the sector being  
erased). Figure 21 shows how read and write cycles  
may be initiated for simultaneous operation with zero  
latency. ICC6 and ICC7 in the DC Characteristics table  
represent the current specifications for read-while-pro-  
gram and read-while-erase, respectively.  
An erase operation can erase one sector, multiple sec-  
tors, or the entire device. Table 2 indicates the address  
space that each sector occupies. Similarly, a sector  
address” is the address bits required to uniquely select  
a sector. The “Command Definitions” section has de-  
tails on erasing a sector or the entire chip, or suspend-  
ing/resuming the erase operation.  
Standby Mode  
When the system is not reading or writing to the de-  
vice, it can place the device in the standby mode. In  
this mode, current consumption is greatly reduced,  
and the outputs are placed in the high impedance  
state, independent of the OE# input.  
The device address space is divided into four banks. A  
“bank address” is the address bits required to uniquely  
select a bank.  
ICC2 in the DC Characteristics table represents the ac-  
tive current specification for the write mode. The AC  
Characteristics section contains timing specification  
tables and timing diagrams for write operations.  
The device enters the CMOS standby mode when the  
CE# and RESET# pins are both held at VCC ± 0.3 V.  
(Note that this is a more restricted voltage range than  
VIH.) If CE# and RESET# are held at VIH, but not within  
VCC ± 0.3 V, the device will be in the standby mode,  
but the standby current will be greater. The device re-  
quires standard access time (tCE) for read access  
when the device is in either of these standby modes,  
before it is ready to read data.  
Accelerated Program Operation  
The device offers accelerated program operations  
through the ACC function. This is one of two functions  
provided by the WP#/ACC pin. This function is prima-  
rily intended to allow faster manufacturing throughput  
at the factory.  
If the device is deselected during erasure or program-  
ming, the device draws active current until the  
operation is completed.  
If the system asserts VHH on this pin, the device auto-  
matically enters the aforementioned Unlock Bypass  
mode, temporarily unprotects any protected sectors,  
and uses the higher voltage on the pin to reduce the  
time required for program operations. The system  
would use a two-cycle program command sequence  
ICC3 in the DC Characteristics table represents the  
standby current specification.  
June 7, 2005  
Am29DL640H  
9