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AM29DL640H70WHI 参数 Datasheet PDF下载

AM29DL640H70WHI图片预览
型号: AM29DL640H70WHI
PDF下载: 下载PDF文件 查看货源
内容描述: 64兆位(8M ×8位/ 4米x 16位) CMOS 3.0伏只,同步读/写闪存 [64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory]
分类和应用: 闪存存储内存集成电路
文件页数/大小: 54 页 / 1243 K
品牌: SPANSION [ SPANSION ]
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DEVICE BUS OPERATIONS  
This section describes the requirements and use of  
the device bus operations, which are initiated through  
the internal command register. The command register  
itself does not occupy any addressable memory loca-  
tion. The register is a latch used to store the com-  
mands, along with the address and data information  
needed to execute the command. The contents of the  
register serve as inputs to the internal state machine.  
The state machine outputs dictate the function of the  
device. Table 1 lists the device bus operations, the in-  
puts and control levels they require, and the resulting  
output. The following subsections describe each of  
these operations in further detail.  
Table 1. Am29DL640H Device Bus Operations  
DQ15–DQ8  
BYTE#  
Addresses  
(Note 2)  
BYTE#  
= VIH  
DQ7–  
DQ0  
Operation  
CE# OE# WE# RESET# WP#/ACC  
= VIL  
Read  
Write  
L
L
L
H
L
H
H
L/H  
AIN  
AIN  
DOUT  
DIN  
DOUT  
DIN  
DQ14–DQ8 =  
High-Z, DQ15 = A-1  
H
(Note 3)  
VCC  
0.3 V  
±
VCC ±  
0.3 V  
Standby  
X
X
L/H  
X
High-Z  
High-Z  
High-Z  
Output Disable  
Reset  
L
H
X
H
X
H
L
L/H  
L/H  
X
X
High-Z  
High-Z  
High-Z  
High-Z  
High-Z  
High-Z  
X
SA, A6 = L,  
A1 = H, A0 = L  
Sector Protect (Note 2)  
L
L
X
H
H
X
L
L
X
VID  
VID  
VID  
L/H  
X
X
X
X
DIN  
DIN  
DIN  
SA, A6 = H,  
A1 = H, A0 = L  
Sector Unprotect (Note 2)  
(Note 3)  
(Note 3)  
Temporary Sector  
Unprotect  
AIN  
DIN  
High-Z  
Legend: L = Logic Low = VIL, H = Logic High = VIH, VID = 11.5–12.5 V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SA = Sector Address,  
AIN = Address In, DIN = Data In, DOUT = Data Out  
Notes:  
1. Addresses are A21:A0 in word mode (BYTE# = VIH), A21:A-1 in byte mode (BYTE# = VIL).  
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector  
Block Protection and Unprotection” section.  
3. If WP#/ACC = VIL, sectors 0, 1, 140, and 141 remain protected. If WP#/ACC = VIH, protection on sectors 0, 1, 140, and 141  
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection  
and Unprotection”. If WP#/ACC = VHH, all sectors will be unprotected.  
Word/Byte Configuration  
Requirements for Reading Array Data  
The BYTE# pin controls whether the device data I/O  
pins operate in the byte or word configuration. If the  
BYTE# pin is set at logic ‘1’, the device is in word con-  
figuration, DQ15–DQ0 are active and controlled by  
CE# and OE#.  
To read array data from the outputs, the system must  
drive the CE# and OE# pins to VIL. CE# is the power  
control and selects the device. OE# is the output con-  
trol and gates array data to the output pins. WE#  
should remain at VIH. The BYTE# pin determines  
whether the device outputs array data in words or  
bytes.  
If the BYTE# pin is set at logic ‘0’, the device is in byte  
configuration, and only data I/O pins DQ7–DQ0 are  
active and controlled by CE# and OE#. The data I/O  
pins DQ14–DQ8 are tri-stated, and the DQ15 pin is  
used as an input for the LSB (A-1) address function.  
The internal state machine is set for reading array data  
upon device power-up, or after a hardware reset. This  
ensures that no spurious alteration of the memory  
content occurs during the power transition. No com-  
mand is necessary in this mode to obtain array data.  
Standard microprocessor read cycles that assert valid  
8
Am29DL640H  
June 7, 2005  
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