D A T A S H E E T
TEST CONDITIONS
Table 13. Test Specifications
Test Condition
All Speeds
Unit
Output Load Capacitance, CL
30
pF
(including jig capacitance)
Input Rise and Fall Times
Input Pulse Levels
Device
Under
Test
5
ns
V
0.0–VCC
C
L
Input timing measurement
reference levels
VCC/2
V
V
Output timing measurement
reference levels
VCC/2
Figure 7. Test Setup
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
OUTPUTS
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Does Not Apply
Changing, State Unknown
Center Line is High Impedance State (High Z)
SWITCHING WAVEFORMS
VCC
VCC/2
VCC/2
Input
Measurement Level
Output
0.0 V
Figure 8. Input Waveforms and
Measurement Levels
32
Am29BDS643G
25692A2 May 8, 2006