D A T A S H E E T
AC CHARACTERISTICS
Read Operations
Speed Options and
Temperature Ranges
Parameter
65R
70R
I, E
70
90R
I, E
90
120R
I, E
JEDEC Std. Description
Test Setup
Min
I
E
Unit
tAVAV
tRC Read Cycle Time (Note 1)
65
65
65
120
ns
CE# = VIL
OE# = VIL
tAVQV tACC Address to Output Delay
Max
70
90
120
ns
tELQV
tGLQV
tCE Chip Enable to Output Delay
tOE Output Enable to Output Delay
OE# = VIL Max
Max
70
24
90
26
120
26
ns
ns
17
17
18
18
Chip Enable to Output High Z
(Note 1)
tEHQZ
tGHQZ
tDF
Max
24
25
26
30
26
30
ns
tDF Output Enable to Output High Z (Note 1)
Read
Max
Min
20
ns
ns
0
Output Enable
Hold Time (Note 1)
tOEH
Toggle and
Data# Polling
Min
Min
10
0
ns
ns
Output Hold Time From Addresses, CE# or
OE#, Whichever Occurs First (Note 1)
tAXQX
tOH
Notes:
1. Not 100% tested.
2. See Figure 13 and Table 6 for test specifications
November 3, 2006 22371C7
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