D A T A S H E E T
ERASE AND PROGRAMMING PERFORMANCE
Parameter
Typ (Note 1)
Max (Note 2)
Unit
Comments
Sector Erase Time
Chip Erase Time
5
15
s
s
Excludes 00h programming
prior to erasure (Note 4)
55
Excludes system level
overhead (Note 5)
Word Programming Time
9
360
54
µs
s
Chip Programming Time (Note 3)
18
Notes:
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V V , 100,000 cycles. Additionally,
CC
programming typicals assume checkerboard pattern.
2. Under worst case conditions of 90°C, V = 3.0 V, 100,000 cycles.
CC
3. The typical chip programming time is considerably less than the maximum chip programming time listed.
4. In the pre-programming step of the Embedded Erase algorithm, all bytes are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See
Table 8 for further information on command definitions.
6. The device has a minimum erase and program cycle endurance of 100,000 cycles.
LATCHUP CHARACTERISTICS
Description
Min
Max
Input voltage with respect to V on all pins except I/O pins
(including A9, OE#, and RESET#)
SS
–1.0 V
12.5 V
Input voltage with respect to V on all I/O pins
–1.0 V
V
+ 1.0 V
CC
SS
V
Current
–100 mA
+100 mA
CC
Includes all pins except V . Test conditions: V = 3.0 V, one pin at a time.
CC
CC
SSOP PIN CAPACITANCE
Parameter
Symbol
Parameter Description
Input Capacitance
Test Setup
Typ
6
Max
7.5
12
Unit
pF
C
V
= 0
IN
IN
C
Output Capacitance
Control Pin Capacitance
V
= 0
8.5
7.5
pF
OUT
OUT
C
V
= 0
IN
9
pF
IN2
Notes:
1. Sampled, not 100% tested.
2. Test conditions T = 25°C, f = 1.0 MHz.
A
DATA RETENTION
Parameter
Test Conditions
150°C
Min
10
Unit
Years
Years
Minimum Pattern Data Retention Time
125°C
20
* For reference only. BSC is an ANSI standard for Basic Space Centering
44
Am29BL162C
July 8, 2005
SPANSION [ SPANSION ]
