A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
Hardware Reset (RESET#)
Parameter
All Speed
Options
JEDEC
Std
Description
RESET# Pin Low (During Embedded Algorithms)
Unit
tReadyw
Max
Max
35
µs
to Read Mode (See Note)
RESET# Pin Low (NOT During Embedded Algorithms)
to Read Mode (See Note)
tReady
500
ns
tRP
tRH
RESET# Pulse Width
Min
Min
Min
500
200
20
ns
ns
µs
Reset High Time Before Read (See Note)
RESET# Low to Standby Mode
tRPD
Note: Not 100% tested.
CE#, OE#
tRH
RESET#
tRP
tReadyw
Reset Timings NOT during Embedded Algorithms
Reset Timings during Embedded Algorithms
CE#, OE#
RESET#
tReady
tRP
Figure 20. Reset Timings
October 31, 2002
Am29BDS640G
47