ADVANCE INFORMATION
Am29BDS640G
64 Megabit (4 M x 16-Bit)
CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
DISTINCTIVE CHARACTERISTICS
— Burst Mode Read: 10 mA
— Simultaneous Operation: 25 mA
— Program/Erase: 15 mA
ARCHITECTURAL ADVANTAGES
■ Single 1.8 volt read, program and erase (1.65 to 1.95
volt)
— Standby mode: 0.2 µA
■ Manufactured on 0.17 µm process technology
■ Enhanced VersatileIO™ (VIO) Feature
HARDWARE FEATURES
— Device generates data output voltages and tolerates
data input voltages as determined by the voltage on
the VIO pin
■ Sector Protection
— Software command sector locking
■ Reduced Wait-State Handshaking feature available
— 1.8V and 3V compatible I/O signals
— Provides host system with minimum possible latency
by monitoring RDY
■ Simultaneous Read/Write operation
— Data can be continuously read from one bank while
executing erase/program functions in other bank
■ Hardware reset input (RESET#)
— Hardware method to reset the device for reading array
data
— Zero latency between read and write operations
— Four bank architecture: 16Mb/16Mb/16Mb/16Mb
■ WP# input
■ Programmable Burst Interface
— Write protect (WP#) function protects sectors 0 and 1
(bottom boot), or sectors 132 and 133 (top boot),
regardless of sector protect status
— 2 Modes of Burst Read Operation
— Linear Burst: 8, 16, and 32 words with wrap-around
— Continuous Sequential Burst
■ ACC input: Acceleration function reduces
programming time; all sectors locked when ACC = VIL
■ Sector Architecture
— Eight 8 Kword sectors and one hundred twenty-six 32
Kword sectors
■ CMOS compatible inputs, CMOS compatible outputs
■ Low VCC write inhibit
— Banks A and D each contain four 8 Kword sectors
and thirty-one 32 Kword sectors; Banks B and C
each contain thirty-two 32 Kword sectors
SOFTWARE FEATURES
■ Supports Common Flash Memory Interface (CFI)
— Eight 8 Kword boot sectors, four at the top of the
address range, and four at the bottom of the address
range
■ Software command set compatible with JEDEC 42.4
standards
— Backwards compatible with Am29F and Am29LV
families
■ Minimum 1 million erase cycle guarantee per sector
■ 20-year data retention at 125°C
■ Data# Polling and toggle bits
— Reliable operation for the life of the system
— Provides a software method of detecting program
and erase operation completion
■ 80-ball FBGA package
■ Erase Suspend/Resume
PERFORMANCE CHARCTERISTICS
— Suspends an erase operation to read data from, or
program data to, a sector that is not being erased,
then resumes the erase operation
■ Read access times at 54/40 MHz (at 30 pF)
— Burst access times of 13.5/20 ns
— Asynchronous random access times of 70 ns
— Initial Synchronous access times as fast as 87.5/95 ns
■ Unlock Bypass Program command
— Reduces overall programming time when issuing
multiple program command sequences
■ Power dissipation (typical values, CL = 30 pF)
Publication# 25903 Rev: B Amendment+0
Issue Date: October 31, 2002
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Refer to AMD’s Website (www.amd.com) for the latest information.
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