D A T A S H E E T
Command Definitions
Table 20. Memory Array Command Definitions
Bus Cycles (Notes 1–6)
First
Addr
Second
Third
Addr
Fourth
Addr
Fifth
Sixth
Addr
Command Sequence
(Notes)
Data
RD
F0
Addr
Data
Data
Data
Addr
Data
Data
Asynchronous Read (7)
Reset (8)
1
1
4
6
4
4
4
6
6
3
2
2
2
1
2
1
1
3
1
RA
XXX
555
555
555
555
555
555
555
555
XX
Manufacturer ID
Device ID (9, 10)*
Sector Lock Verify (12)*
Indicator Bits (13)*
Program
AA
AA
AA
AA
AA
AA
AA
AA
A0
80
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
PA
55
55
55
55
55
55
55
55
PD
30
10
BA+555
BA+555
SA+555
BA+555
555
90
90
90
90
A0
80
80
20
BA+X00
BA+X01
SA+X02
BA+X03
PA
0001
227E
(12)*
(13)*
Data
AA
BA+X0E
(10)*
BA+X0F
(11)*
Chip Erase
555
555
2AA
2AA
55
55
555
SA
10
30
Sector Erase
555
555
AA
Entry
555
Program (14, 15)
Sector Erase (14, 15)
Erase (14, 15)
XX
SA
XX
80
XXX
CFI (14, 15)
XX
98
Reset (20)
XX
90
XXX
2AA
00
55
Erase Suspend (16)
Erase Resume (17)
Set Configuration Register (18)
CFI Query (19)
BA
B0
30
BA
555
55
AA
98
(CR)555
C0
* For actual hexadecimal data values, refer to the note number indicated.
Legend:
X = Don’t care
SA = Address of the sector to be verified (in autoselect mode) or erased.
Address bits Amax–A12 uniquely select any sector.
BA = Address of the bank (BDS128H: A22–A20; BDS640H: A21–A19) for
which command is being written.
SLA = Address of the sector to be locked. Set sector address (SA) and
either A6 = 1 for unlocked or A6 = 0 for locked.
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch
on the rising edge of the AVD# pulse or active edge of CLK which ever
comes first.
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE# pulse, whichever happens first.
CR = Configuration Register address bits A19–A12.
Notes:
1. See Table 1 for description of bus operations.
13. DQ15–DQ8 = 0, DQ7: Factory Lock Bit (1 = Locked, 0 = Not
Locked), DQ6: Customer Lock Bit (1 = Locked, 0 = Not Locked),
DQ5: Handshake Bit (1 = Reduced wait-state Handshake, 0 =
Standard Handshake), DQ4–DQ0 = 0
2. All values are in hexadecimal.
3. Shaded cells indicate read cycles. All others are write cycles.
4. Data bits DQ15–DQ8 are don’t care in command sequences, except
for RD and PD.
14. The Unlock Bypass command sequence is required prior to this
command sequence.
5. Unless otherwise noted, address bits Amax–A12 are don’t cares.
15. The Unlock Bypass Reset command is required to return to reading
array data when the bank is in the unlock bypass mode.
6. Writing incorrect address and data values or writing them in the
improper sequence may place the device in an unknown state. The
system must write the reset command to return the device to
reading array data.
16. The system may read and program in non-erasing sectors, or enter
the autoselect mode, when in the Erase Suspend mode. The Erase
Suspend command is valid only during a sector erase operation,
and requires the bank address.
7. No unlock or command cycles required when bank is reading array
data.
17. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
8. The Reset command is required to return to reading array data (or to
the erase-suspend-read mode if previously in Erase Suspend) when
a bank is in the autoselect mode, or if DQ5 goes high (while the
bank is providing status information) or performing sector
lock/unlock.
18. See “Set Configuration Register Command Sequence” for details.
This command is unavailable in Unlock Bypass mode.
19. Command is valid when device is ready to read array data or when
device is in autoselect mode.
9. The fourth cycle of the autoselect command sequence is a read
cycle. The system must provide the bank address. See the
Autoselect Command Sequence section for more information.
20. The Unlock Bypass Reset command is required to exit this mode
before sending any other commands to the device. The only
commands that are allowed in the Unlock Bypass mode are the
Entry and exit (Reset), Program, Erase, Sector Erase and CFI.
10. BDS128H: 2218h; BDS640H: 221Eh.
11. BDS128H: 2200h; BDS640H: 2201h
12. The data is 0000h for an unlocked sector and 0001h for a locked
sector
46
Am29BDS128H/Am29BDS640H
27024B3 May 10, 2006
SPANSION [ SPANSION ]
