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AM26LV400BT-55RWAK 参数 Datasheet PDF下载

AM26LV400BT-55RWAK图片预览
型号: AM26LV400BT-55RWAK
PDF下载: 下载PDF文件 查看货源
内容描述: 4兆位( 512K的×8位/ 256千×16位) CMOS 3.0伏只引导扇区闪存 [4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory]
分类和应用: 闪存
文件页数/大小: 48 页 / 1129 K
品牌: SPANSION [ SPANSION ]
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D A T A S H E E T  
vice has returned to reading array data, to ensure data  
Once the sector erase operation has begun, only the  
Erase Suspend command is valid. All other com-  
mands are ignored. Note that a hardware reset dur-  
ing the sector erase operation immediately terminates  
the operation. The Sector Erase command sequence  
should be reinitiated once the device has returned to  
reading array data, to ensure data integrity.  
integrity.  
The system can determine the status of the erase op-  
eration by using DQ7, DQ6, DQ2, or RY/BY#. See  
“Write Operation Status” for information on these sta-  
tus bits. When the Embedded Erase algorithm is com-  
plete, the device returns to reading array data and  
addresses are no longer latched.  
When the Embedded Erase algorithm is complete, the  
device returns to reading array data and addresses  
are no longer latched. The system can determine the  
status of the erase operation by using DQ7, DQ6,  
DQ2, or RY/BY#. (Refer to “Write Operation Status” for  
information on these status bits.)  
Figure 4 illustrates the algorithm for the erase opera-  
tion. See the Erase/Program Operations tables in “AC  
Characteristics” for parameters, and to Figure 18 for  
timing diagrams.  
Sector Erase Command Sequence  
Figure 4 illustrates the algorithm for the erase opera-  
tion. Refer to the Erase/Program Operations tables in  
the “AC Characteristics” section for parameters, and to  
Figure 18 for timing diagrams.  
Sector erase is a six bus cycle operation. The sector  
erase command sequence is initiated by writing two  
unlock cycles, followed by a set-up command. Two ad-  
ditional unlock write cycles are then followed by the  
address of the sector to be erased, and the sector  
erase command. Table 5 shows the address and data  
requirements for the sector erase command se-  
quence.  
Erase Suspend/Erase Resume  
Commands  
The Erase Suspend command allows the system to in-  
terrupt a sector erase operation and then read data  
from, or program data to, any sector not selected for  
erasure. This command is valid only during the sector  
erase operation, including the 50 µs time-out period  
during the sector erase command sequence. The  
Erase Suspend command is ignored if written during  
the chip erase operation or Embedded Program algo-  
rithm. Writing the Erase Suspend command during the  
Sector Erase time-out immediately terminates the  
time-out period and suspends the erase operation. Ad-  
dresses are “don’t-cares” when writing the Erase Sus-  
pend command.  
The device does not require the system to preprogram  
the memory prior to erase. The Embedded Erase al-  
gorithm automatically programs and verifies the sector  
for an all zero data pattern prior to electrical erase.  
The system is not required to provide any controls or  
timings during these operations.  
After the command sequence is written, a sector erase  
time-out of 50 µs begins. During the time-out period,  
additional sector addresses and sector erase com-  
mands may be written. Loading the sector erase buffer  
may be done in any sequence, and the number of sec-  
tors may be from one sector to all sectors. The time  
between these additional cycles must be less than 50  
μs, otherwise the last address and command might  
not be accepted, and erasure may begin. It is recom-  
mended that processor interrupts be disabled during  
this time to ensure all commands are accepted. The  
interrupts can be re-enabled after the last Sector  
Erase command is written. If the time between addi-  
tional sector erase commands can be assumed to be  
less than 50 µs, the system need not monitor DQ3.  
Any command other than Sector Erase or Erase  
Suspend during the time-out period resets the de-  
vice to reading array data. The system must rewrite  
the command sequence and any additional sector ad-  
dresses and commands.  
When the Erase Suspend command is written during a  
sector erase operation, the device requires a maxi-  
mum of 20 μs to suspend the erase operation. How-  
ever, when the Erase Suspend command is written  
during the sector erase time-out, the device immedi-  
ately terminates the time-out period and suspends the  
erase operation.  
After the erase operation has been suspended, the  
system can read array data from or program data to  
any sector not selected for erasure. (The device “erase  
suspends” all sectors selected for erasure.) Normal  
read and write timings and command definitions apply.  
Reading at any address within erase-suspended sec-  
tors produces status data on DQ7–DQ0. The system  
can use DQ7, or DQ6 and DQ2 together, to determine  
if a sector is actively erasing or is erase-suspended.  
See “Write Operation Status” for information on these  
status bits.  
The system can monitor DQ3 to determine if the sec-  
tor erase timer has timed out. (See the “DQ3: Sector  
Erase Timer” section.) The time-out begins from the  
rising edge of the final WE# pulse in the command se-  
quence.  
After an erase-suspended program operation is com-  
plete, the system can once again read array data  
within non-suspended sectors. The system can deter-  
mine the status of the program operation using the  
December 4, 2006 21523D4  
Am29LV400B  
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