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CXD1968AR 参数 Datasheet PDF下载

CXD1968AR图片预览
型号: CXD1968AR
PDF下载: 下载PDF文件 查看货源
内容描述: DVB -T解调器 [DVB-T Demodulator]
分类和应用:
文件页数/大小: 97 页 / 746 K
品牌: SONY [ SONY CORPORATION ]
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CXD1968AR  
AGC_ENH_CTL  
Read/Write  
RESET: 0x0C  
Default R/W  
Offset Address: 0x52  
Bit  
Name  
Description  
7:6 Reserved  
00  
R/W  
When set the 12-bit AGC and PWM is selected. This  
5
AGC_PWM12BITENABLE gives 12-bit resolution on the IFAGC PWM output  
instead of 10-bit resolution on the CXD1973Q.  
0
R/W  
Enhanced AGC update rate. These bits determine the  
rate (in ADC samples) at which the AGC target level is  
updated when the enhanced AGC is enabled. The  
4:1 AGCENHUPDATE  
0110  
R/W  
R/W  
update rate in samples is given by;  
Samples per update = (AGCENHUPDATE + 1) × 8192  
The default is 57,344 samples.  
Enhanced AGC enable. When set, the AGC target  
level set by the AGC_TARGET register, is  
automatically optimized to maximize ADC dynamic  
range, once AGC lock has occurred. This improves  
performance in channels where the interference  
produces non-gaussian distribution in the sampled  
input signal, such as channels with large amounts of  
PAL ACI. This is not recommended for use with dual  
AGC control in ZIF mode.  
0
AGC ENHENABLE  
0
AGC_MEAN_CX  
Read/Write  
Description  
RESET: 0x04  
Default R/W  
Offset Address: 0x53  
Bit  
Name  
7:4 Reserved  
0000  
R/W  
Sets the mean value of threshold crossings in enhanced AGC  
algorithm. This value determines the number of times a  
sample can exceed an internal threshold before the AGC  
target value is decreased. The recommended value is “4”.  
3:0 AGCMEANCX  
0100  
R/W  
AGC_BWREDOFFSET  
Read/Write  
RESET: 0x0A  
Default R/W  
Offset Address: 0x54  
Bit  
Name  
Description  
7:4 Reserved  
0000  
R/W  
AGC bandwidth reduction offset. Sets a base level AGC  
3:0 AGCBWREDOFFSET gain reduction which is reduced further by AGC_CTL  
(AGC BW Reduction) after AGC lock is achieved.  
1010  
R/W  
Note) 1. Higher values result in lower gains, lower bandwidth and longer acquisition times.  
2. Lower values result in higher gains, higher bandwidth and shorter acquisition times.  
3. To prevent excessive AGC gain fluctuation from too high a bandwidth, it is recommended that  
the sum of AGCBWREDOFFSET and AGC_CTL(AGC BW Reduction) should exceed 4.  
The default of AGCBWREDOFFSET = 10 maintains compatibility with the CXD1973Q.  
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