CXA3106Q
(1) Recommended PECL I/O circuit
The peripheral circuits mainly use PECL for digital input and output. Of course, PECL and TTL can also be
mixed. In this case, disable the TTL outputs with the control registers.
PECL level output pins
330Ω
GND
35
32
36
34
33
31
30
29
28
27
26
25
37 IOGND
DSYNC 24
IOVCC
38
39
CLK 23
PLLVCC
CLKN 22
40 PLLGND
CLK/2
21
VCOVCC
VCOGND
VCOHGND
IREF
41
42
43
44
45
CLK/2N 20
DGND
DVCC
19
18
VCC
100kΩ
100pF
2
UNLOCK output
1.6kΩ
100Ω
0.33µF
3
UNLOCK 17
DIVOUT 16
10nF
GND
RC2
1200pF
46 RC1
SEROUT
CS 14
TLOAD
15
3.3kΩ
4
IRGND
47
48
Loop Filter
IRVCC
13
1
2
3
4
5
6
7
8
9
10
11
12
GND
VCC (+5.0V)
Control
Register
Notes)
1 Unless otherwise specified, all capacitors are 0.1µF.
2 Vary the external resistor and capacitor values of the
UNLOCK output as necessary.
3 This external resistor (1.6kΩ) should be a metal film
resistor in consideration of temperature characteristics.
4 The loop filter's capacitors and resistor should also be
temperature compensated.
HOLD SYNCH, SYNCL: PECL level
complementary input
– 34 –
SONY [ SONY CORPORATION ]
