CXA2095S
RIGHT-BLK
(4)
: HBLK width control for the right side of picture when HBLKSW = 1
(Phase control for timing pulse generated from HVCO)
0H = +1.3µs
7H = 0µs
HBLK width maximum
Center HBLK: 13µs
HBLK width minimum
FH = –1.3µs
<Status Register>
HLOCK
(1)
(1)
(1)
(1)
(1)
: Lock status between Hsync and HVCO
0 = HVCO free run status
1 = Locked to Hsync
IKR
: AKB operation status
0 = REF-P return small and AKB loop unstable.
1 = REF-P return sufficient and AKB loop stable.
VNG
HNG
KILLER
: Signal input status to VPROT pin
0 = No VPROT input
1 = VPROT input (In this case, RGB outputs are blanked.)
: Signal input status to HOFF pin
0 = No HOFF input
1 = HOFF input (In this case, RGB outputs are blanked.)
: Color killer status
0 = Killer OFF status
1 = Killer ON status
Note) The following have been added to the CXA2025S.
EY-SW: Sub Add 09H, Bit 1
CD-MODE2: Sub Add 09H, Bit 0
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SONY [ SONY CORPORATION ]
