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CXA1734S 参数 Datasheet PDF下载

CXA1734S图片预览
型号: CXA1734S
PDF下载: 下载PDF文件 查看货源
内容描述: 美国音频多路复用解码器 [US Audio Multiplexing Decoder]
分类和应用: 解码器
文件页数/大小: 30 页 / 472 K
品牌: SONY [ SONY CORPORATION ]
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CXA1734S  
5
SAP block filter adjustment  
1. TEST BIT is set to “TEST1 = 1” and “TEST-DA = 0”.  
2. Input a 88 kHz, 120 mVrms sine wave signal to COMPIN. While monitoring the STATUS FLAG (STA4)  
condition, vary and adjust the “SAPLPF” adjustment data.  
3. Adjustment range:  
Adjustment bits:  
±20%  
4 bits  
Align SAPLPF with the center of the STA4 = 1 (adjustment OK) condition range.  
Adjustment point  
Control data  
"SAPLPF"  
0
F
1
0
Measurement data  
STA4 "SAPLPF"  
6
Separation adjustment  
1. TEST BIT is set to “TEST1 = 0” and “TEST-DA = 0”.  
2. Set the unit to stereo mode and input the left channel only signal (modulation factor 30%, frequency  
300 Hz) to COMPIN. At this time, adjust the “WIDEBAND” adjustment data to reduce ROUT output to  
the minimum.  
3. Next, set the frequency only of the input signal to 3 kHz and adjust the “SPECTRAL” adjustment data  
to reduce ROUT output to the minimum.  
4. Then, the adjustments in 2 and 3 above are performed to optimize the separation.  
5. “WIDEBAND”  
Adjustment range:  
Adjustment bits:  
“SPECTRAL”  
±30%  
6 bits  
Adjustment range: ±15%  
Adjustment bits:  
6 bits  
—16—  
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