t1
t2
t2
X1K
t4
nRESET
units
Parameter
min
typ
max
ns
ns
us
65
Clock CycleTime for 14.318MHZ
70
35
t1
t2
Clock High Time/Low Time for
14.318MHZ
Clock Cycle Time for 32KHZ
Clock High Time/Low Time for 32KHz
Clock Rise Time/Fall Time (not shown)
nRESET Low Time
31.25
16.53
t1
t2
us
ns
us
5
1.5
t4
The nRESET low time is dependent upon the processor clock. The
nRESET must be active for a minimum of 24 x16MHz clock cycles.
FIGURE 6 - CLOCK TIMING
SMSC DS – SP37E760
Page 64
Rev. 04/13/2001