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LPC47M182-NR 参数 Datasheet PDF下载

LPC47M182-NR图片预览
型号: LPC47M182-NR
PDF下载: 下载PDF文件 查看货源
内容描述: 先进的I / O控制器,主板胶合逻辑 [ADVANCED I/O CONTROLLER WITH MOTHERBOARD GLUE LOGIC]
分类和应用: 控制器
文件页数/大小: 223 页 / 1215 K
品牌: SMSC [ SMSC CORPORATION ]
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Advanced I/O Controller with Motherboard GLUE Logic  
Datasheet  
When both GAP and WGATE bits of the PERPENDICULAR MODE COMMAND are both programmed to  
“0” (Conventional mode), then D0, D1, D2, D3, and D4 can be programmed independently to “1” for that  
drive to be set automatically to Perpendicular mode. In this mode the following set of conditions also  
apply:  
1. The GAP2 written to a perpendicular drive during a write operation will depend upon the programmed  
data rate.  
2. The write pre-compensation given to a perpendicular mode drive will be 0ns.  
3. For D0-D3 programmed to “0” for conventional mode drives any data written will be at the currently  
programmed write pre-compensation.  
Note: Bits D0-D3 can only be overwritten when OW is programmed as a “1”.If either GAP or WGATE is a  
“1” then D0-D3 are ignored.  
Software and hardware resets have the following effect on the PERPENDICULAR MODE COMMAND:  
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“Software” resets (via the DOR or DSR registers) will only clear GAP and WGATE bits to “0”. D0-D3  
are unaffected and retain their previous value.  
“Hardware” resets will clear all bits (GAP, WGATE and D0-D3) to “0”, i.e all conventional mode.  
Revision 1.8 SMSC/Non-SMSC Register Sets (02-24-05)  
76  
SMSC LPC47M182  
DATASHEET  
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