REG OFFSET
(hex)
NAME
DESCRIPTION
FAN1
56
FAN Register 1
Bit[0] Fan Control
Default = 0x00
on VTR POR
(R/W)
1=FAN1 pin is high
0=bits[6:1] control the duty cycle of the
FAN1 pin.
Bit[6:1] Duty Cycle Control for FAN1
Control the duty cycle of the FAN1 pin
000000 = pin is low
100000 = 50% duty cycle
111111 = pin is high for 63, low for 1
Bit[7] Fan 1 Clock Select
This bit is used with the Fan 1 Clock Source Select and
the Fan 1 Clock Multiplier bits in the Fan Control register
(0x58) to determine the fan speed FOUT
.
See Table 57
–
Different Modes for Fan in “Fan Speed Control and
Monitoring” section.
The fan speed may be doubled through bit 2 of Fan
Control Register at 0x58.
FAN Register 2
FAN2
57
Bit[0] Fan Control
1=FAN2 pin is high
Default = 0x00
on VTR POR
(R/W)
0=bits[6:1] control the duty cycle of the
FAN2 pin.
Bit[6:1] Duty Cycle Control for FAN2
Control the duty cycle of the FAN2 pin
000000 = pin is low
100000 = 50% duty cycle
111111 = pin is high for 63, low for 1
Bit[7] Fan 2 Clock Select
This bit is used with the Fan 2 Clock Source Select and
the Fan 2 Clock Multiplier bits in the Fan Control register
(0x58) to determine the fan speed FOUT
.
See Table 57
–
Different Modes for Fan in “Fan Speed Control and
Monitoring” section.
The fan speed may be doubled through bit 3 of Fan
Control Register at 0x58.
SMSC DS – LPC47M14X
Page 148
Rev. 03/19/2001
SMSC [ SMSC CORPORATION ]
