The other GPIOs function as follows:
GP36, GP37 and GP40:
•
Buffers are powered by VCC, but in the absence of VCC they are backdrive protected. These pins do not have
input buffers into the wakeup logic that are powered by VTR.
These pins are not used for wakeup.
GP35, GP42, GP53, GP60 and GP61:
•
Buffers powered by VTR.
GP35 and GP53 have IR transmit functionality and their output buffers are powered by VTR so that the pins are
always forced low when not used.
GP42 is the nIO_PME pin which is active under VTR.
GP60 and GP61 have LED as the alternate function and the logic is able to control the pin under VTR.
The IRTX pins (IRTX2/GP35 and GP53/TXD2) are powered by VTR so that they are driven low when VCC = 0V with
VTR = 3.3V. The IRTX2/GP35 pin will remain low following a VCC POR until serial port 2 is enabled by setting the
activate bit, at which time the pin will reflect the state of the IR transmit output of the IRCC block. The GP53/TXD2
pin will remain low following a VCC POR until the TXD2 function is selected for the pin and serial port is enabled by
setting the activate bit, at which time the pin will reflect the state of the IR transmit output of the IRCC block (if IR is
enabled). If the TXD2 function is selected for the pin, it will remain low following a VCC POR until the serial port is
enabled by setting the activate bit, at which time the pin will reflect the state of the transmit output of the serial port.
The following list summarizes the blocks, registers and pins that are powered by VTR.
•
•
•
•
•
•
•
•
•
PME interface block
PME runtime register block (includes all PME, SMI, GPIO, Fan and other miscellaneous registers)
CIR block
CIR runtime registers
CIR configuration registers
“Wake on Specific Key” logic
LED control logic
Fan Tachometers
Pins for PME Wakeup:
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-
-
-
-
-
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GP42/nIO_PME (output, buffer powered by VTR)
nRI1 (input)
GP50/nRI2 (input)
GP52/RXD2 (input)
KDAT (input)
IRRX2/GP34 (input)
GPIOs (GP10-GP17, GP20-GP22, GP24-GP27, GP30-GP37, GP41, GP43, GP50-GP57, GP60, GP61) – all
input-only except GP53, GP60, GP61. See below.
•
Other Pins
-
-
-
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IRTX2/GP35 (output, buffer powered by VTR)
GP53/TXD2 (output, buffer powered by VTR)
GP60/LED1 (output, buffer powered by VTR)
GP61/LED2 (output, buffer powered by VTR)
VREF Pin
The LPC47B27x has a reference voltage pin input on pin 44 of the part. This reference voltage can be connected to
either a 5V supply or a 3.3V supply. It is used for the game port. See the “GAME PORT LOGIC” section.
Maximum Current Values
See the “Operational Description” section for the maximum current values.
The maximum VTR current, ITR, is given with all outputs open (not loaded) and all inputs in a fixed state (i.e., 0V or
3.3V). The total maximum current for the part is the unloaded value PLUS the maximum current sourced by the pin
that is driven by VTR. The pins that are powered by VTR are as follows: GP42 / nIO_PME, IRTX2 / GP35,
GP53/TXD2, GP60 / LED1, GP61 / LED2. These pins, if configured as push-pull outputs, will source a minimum of
6mA at 2.4V when driving.
SMSC LPC47B27x
- 17 -
Rev. 08-10-04
DATASHEET
SMSC [ SMSC CORPORATION ]
