2.2
Block Diagram
IEEE 1588
Time Stamp
Virtual PHY
Registers
MDIO
MII
MII
MDIO
MII
To Ethernet
10/100
PHY
10/100
MAC
10/100
MAC
To optional PHY, MAC,
or SMI Master
MII
Mode
MUX
MDIO
Registers
MDIO
PHY Management
Interface (PMI)
Management Mode
Configuration Straps
IEEE 1588
Time Stamp
Search
Engine
Switch Engine
Buffer Manager
IEEE 1588
Time Stamp
SMI (slave)
Controller
MDIO
Frame
Buffers
MII
SPI/I2C
Switch
Registers
(CSRs)
Register
Access
MUX
SPI (slave)
I2C (slave)
Controller
To optional CPU
serial management
(via I2C/SPI slave)
To Ethernet
10/100
10/100
MAC
PHY
MDIO
Registers
System
Registers
(CSRs)
Switch Fabric
EEPROM Loader
System
GP Timer
IEEE 1588
Time Stamp
Clock/Events
System
Interrupt
Controller
I2C/Microwire
EEPROM Controller
I2C (master)
Microwire (master)
GPIO/LED
Controller
Clocks/
Reset/PME
Controller
To optional EEPROM
(via I2C/Microwire master)
Free-Run
Clk
LAN9313/LAN9313i
To optional GPIOs/LEDs
IRQ
External
25MHz Crystal
Figure 2.1 Internal LAN9313/LAN9313i Block Diagram
SMSC [ SMSC CORPORATION ]
