Three Port 10/100 Managed Ethernet Switch with MII
Datasheet
Chapter 2 Introduction
2.1
General Description
The LAN9313/LAN9313i is a full featured, 3 port 10/100 managed Ethernet switch designed for
embedded applications where performance, flexibility, ease of integration and system cost control are
required. The LAN9313/LAN9313i combines all the functions of a 10/100 switch system, including the
switch fabric, packet buffers, buffer manager, media access controllers (MACs), PHY transceivers, and
serial management. The LAN9313/LAN9313i complies with the IEEE 802.3 (full/half-duplex 10BASE-
T and 100BASE-TX) Ethernet protocol specification and 802.1D/802.1Q network management protocol
specifications, enabling compatibility with industry standard Ethernet and Fast Ethernet applications.
At the core of the LAN9313/LAN9313i is the high performance, high efficiency 3 port Ethernet switch
fabric. The switch fabric contains a 3 port VLAN layer 2 switch engine that supports untagged, VLAN
tagged, and priority tagged frames. The switch fabric provides an extensive feature set which includes
spanning tree protocol support, multicast packet filtering and Quality of Service (QoS) packet
prioritization by VLAN tag, destination address, port default value or DIFFSERV/TOS, allowing for a
range of prioritization implementations. 32K of buffer RAM allows for the storage of multiple packets
while forwarding operations are completed, and a 1K entry forwarding table provides ample room for
MAC address forwarding tables. Each port is allocated a cluster of 4 dynamic QoS queues which allow
each queue size to grow and shrink with traffic, effectively utilizing all available memory. This memory
is managed dynamically via the buffer manager block within the switch fabric. All aspects of the switch
fabric are managed via the switch fabric configuration and status registers, which are indirectly
accessible via the system control and status registers.
The LAN9313/LAN9313i provides 3 switched ports. Each port is fully compliant with the IEEE 802.3
standard and all internal MACs and PHYs support full/half duplex 10BASE-T and 100BASE-TX
operation. The LAN9313/LAN9313i provides 2 on-chip PHYs, 1 Virtual PHY and 3 MACs. The Virtual
PHY and the third MAC are used to connect the LAN9313/LAN9313i switch fabric to an external MAC
or PHY. All ports support automatic or manual full duplex flow control or half duplex backpressure
(forced collision) flow control. 2K jumbo packet (2048 byte) support allows for oversized packet
transfers, effectively increasing throughput while deceasing CPU load. All MAC and PHY related
settings are fully configurable via their respective registers within the LAN9313/LAN9313i.
The integrated SPI, I2C and SMI slave controllers allow for full serial management of the
LAN9313/LAN9313i via the integrated SPI/I2C serial interface or MII interface respectively. The
inclusion of these interfaces allows for greater flexibility in the incorporation of the LAN9313/LAN9313i
into various designs. It is this flexibility which allows the LAN9313/LAN9313i to operate in 2 different
modes and under various management conditions. In MAC mode, the LAN9313/LAN9313i can be
connected to an external PHY via the MII interface. In PHY mode, the LAN9313/LAN9313i can be
connected to an external MAC via the MII interface. In both MAC and PHY modes, the
LAN9313/LAN9313i can be unmanaged, SMI managed, I2C managed or SPI managed. This flexibility
in management makes the LAN9313/LAN9313i a candidate for virtually all switch applications.
The LAN9313/LAN9313i contains an I2C/Microwire master EEPROM controller for connection to an
optional EEPROM. This allows for the storage and retrieval of static data. The internal EEPROM
Loader can be optionally configured to automatically load stored configuration settings from the
EEPROM into the LAN9313/LAN9313i at reset, allowing the LAN9313/LAN9313i to operate
unmanaged.
In addition to the primary functionality described above, the LAN9313/LAN9313i provides additional
features designed for extended functionality. These include a configurable 16-bit General Purpose
Timer (GPT), a 32-bit 25MHz free running counter, a 12-bit configurable GPIO/LED interface, and IEEE
1588 time stamping on all ports and select GPIOs. The IEEE time stamp unit provides a 64-bit tunable
clock for accurate PTP timing and a timer comparator to allow time based interrupt generation.
The LAN9313/LAN9313i’s performance, features and small size make it an ideal solution for many
applications in the consumer electronics and industrial automation markets. Targeted applications
include: set top boxes (cable, satellite and IP), digital televisions, digital video recorders, voice over IP
and video phone systems, home gateways, and test and measurement equipment.
Revision 1.2 (04-08-08)
SMSC LAN9313/LAN9313i
DATA1S8HEET
SMSC [ SMSC CORPORATION ]
