16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
3.14.6.2
TX Example 2
In this example, a single 183-Byte Ethernet packet will be transmitted. This packet is in a single buffer
as follows:
2-Byte “Data Start Offset”
183-Bytes of payload data
4-Byte “Buffer End Alignment”
Figure 3.15, "TX Example 2" illustrates the TX command structure for this example, and also shows
how data is passed to the TX data FIFO. Note that the packet resides in a single TX Buffer, therefore
both the FS and LS bits are set in TX command ‘A’.
Data Passed to the
TX Data FIFO
Data Written to the
Ethernet Controller
31
0
TX Command 'A'
Buffer End Alignment = 0
Data Start Offset = 6
First Segment = 1
Last Segment = 1
Buffer Size =183
TX Command 'A'
TX Command 'B'
TX Command 'A'
TX Command 'B'
6-Byte Data Start Offset
TX Command 'B'
Packet Length = 183
183-Byte Payload Data
183-Byte Payload Data
3B End Padding
NOTE: Extra bytes between buffers
are not transmitted
Figure 3.15 TX Example 2
SMSC LAN9217
Revision 1.5 (07-18-06)
DATA5S3HEET
SMSC [ SMSC CORPORATION ]
