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LAN9215I_07 参数 Datasheet PDF下载

LAN9215I_07图片预览
型号: LAN9215I_07
PDF下载: 下载PDF文件 查看货源
内容描述: 高效的单芯片10/100以太网控制器与HP Auto-MDIX的和工业温度支持 [Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support]
分类和应用: 控制器以太网局域网(LAN)标准
文件页数/大小: 138 页 / 1665 K
品牌: SMSC [ SMSC CORPORATION ]
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Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support  
Datasheet  
5.3.13  
PMT_CTRL— Power Management Control Register  
Offset:  
84h  
Size:  
32 bits  
This register controls the Power Management features. This register can be read while the  
LAN9215i is in a power saving mode.  
Note: The LAN9215i must always be read at least once after power-up, reset, or upon return from a  
power-saving state or write operations will not function.  
BITS  
DESCRIPTION  
TYPE  
DEFAULT  
31:14  
13-12  
RESERVED  
RO  
SC  
-
Power Management Mode (PM_MODE) These bits set the LAN9215i into  
the appropriate Power Management mode. Special care must be taken when  
modifying these bits.  
00b  
Encoding:  
00b – D0 (normal operation)  
01b – D1 (wake-up frame and magic packet detection are enabled)  
10b – D2 (can perform energy detect)  
11b – RESERVED - Do not set in this mode  
Note:  
When the LAN9215i is in any of the reduced power modes, a write  
of any data to the BYTE_TEST register will wake-up the device. DO  
NOT PERFORM WRITES TO OTHER ADDRRESSES while the  
READY bit in this register is cleared.  
11  
10  
RESERVED  
RO  
SC  
-
PHY Reset (PHY_RST) – Writing a ‘1’ to this bit resets the PHY. The internal  
logic automatically holds the PHY reset for a minimum of 100us. When the  
PHY is released from reset, this bit is automatically cleared. All writes to this  
bit are ignored while this bit is high.  
0b  
9
8
Wake-On-Lan Enable (WOL_EN) – When set, the PME signal (if enabled  
with PME_EN) will be asserted in accordance with the PME_IND bit upon a  
WOL event. When set, the PME_INT will also be asserted upon a WOL  
event, regardless of the setting of the PME_EN bit.  
R/W  
R/W  
RO  
0b  
0b  
Energy-Detect Enable (ED_EN) - When set, the PME signal (if enabled with  
PME_EN) will be asserted in accordance with the PME_IND bit upon an  
Energy-Detect event. When set, the PME_INT will also be asserted upon an  
Energy Detect event, regardless of the setting of the PME_EN bit.  
7
6
RESERVED  
-
PME Buffer Type (PME_TYPE) – When cleared, enables PME to function  
as an open-drain buffer for use in a Wired-Or configuration. When set, the  
PME output is a Push-Pull driver. When configured as an open-drain output  
the PME_POL field is ignored, and the output is always active low.  
R/W  
NASR  
0b  
Revision 1.93 (12-12-07)  
88  
SMSC LAN9215i  
DATASHEET