Highly Efficient Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
Datasheet
SystemMemory
Sy stemMemory
System
Peripherals
Optional
Optional
External
PHY
Magnetics
MII
Ethernet
Embedded
Microprocessor/
LAN9215I
Magnetics
SystemBus
Microcontroller
LEDS/GPIO
25MHz
XTAL
EEPROM
(Optional)
Figure 1.1 System Block Diagram
The SMSC LAN9215I integrated 10/100 MAC/PHY controller is a peripheral chip that performs the
function of translating parallel data from a host controller into Ethernet packets. The LAN9215I Ethernet
MAC/PHY controller is designed and optimized to function in an embedded environment. All
communication is performed with programmed I/O transactions using the simple SRAM-like host
interface bus.
The diagram shown above, describes a typical system configuration of the LAN9215I in a typical
embedded environment.
The LAN9215I is a general purpose, platform independent, Ethernet controller. The LAN9215I consists
of four major functional blocks. The four blocks are:
10/100 Ethernet PHY
10/100 Ethernet MAC
RX/TX FIFOs
Host Bus Interface (HBI)
1.1
Compatibility with First-generation LAN9118 Family Devices
The LAN9215I is driver-, register-, and footprint-compatible with previous generation LAN9118 Family
devices. Drivers written for these products will work with the LAN9215I. However, in order to support
HP Auto-MDIX, other components such as the magnetics and the passive components around the
magnetics need to change, and supporting these changes does require a minor PCB change. A
reference design for the LAN9215I will be available on SMSC’s website.
Revision 1.5 (07-18-06)
SMSC LAN9215I
DATA1S0HEET
SMSC [ SMSC CORPORATION ]
