High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX
Datasheet
WORD_SWAP != FFFF_FFFFh
BIG ENDIAN
LITTLE ENDIAN
(FPORTEND = 1 for Data FIFO port access on addresses 00h-3Ch)
AND/OR (FSELEND = 1 for Data FIFO direct access when FIFO_SEL=1)
(FPORTEND = 0 for Data FIFO port access on addresses 00h-3Ch)
AND/OR (FSELEND = 0 for Data FIFO direct access when FIFO_SEL=1)
INTERNAL FIFO ORDER
INTERNAL FIFO ORDER
MSB
MSB
LSB
LSB
31
31
24 23
16 15
8
7
0
24 23
16 15
8
7
0
3
2
1
0
3
2
1
0
A[1] = 1
A[1] = 0
A[1] = 1
A[1] = 0
3
1
2
0
0
2
1
3
15
8
7
0
15
8
7
0
HOST DATA BUS
HOST DATA BUS
WORD_SWAP = FFFF_FFFFh
BIG ENDIAN
LITTLE ENDIAN
(FPORTEND = 1 for Data FIFO port access on addresses 00h-3Ch)
AND/OR (FSELEND = 1 for Data FIFO direct access when FIFO_SEL=1)
(FPORTEND = 0 for Data FIFO port access on addresses 00h-3Ch)
AND/OR (FSELEND = 0 for Data FIFO direct access when FIFO_SEL=1)
INTERNAL FIFO ORDER
INTERNAL FIFO ORDER
MSB
MSB
LSB
LSB
31
31
24 23
16 15
8
7
0
24 23
16 15
8
7
0
3
2
1
0
3
2
1
0
A[1] = 1
A[1] = 0
A[1] = 1
A[1] = 0
1
3
0
2
2
0
3
1
15
8
7
0
15
8
7
0
HOST DATA BUS
HOST DATA BUS
Figure 3.3 FIFO Access Byte Ordering
SMSC LAN9211
35
Revision 1.93 (11-27-07)
DATASHEET
SMSC [ SMSC CORPORATION ]
