High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.2.16 Port x MAC Receive Fragment Error Count Register (MAC_RX_FRAG_CNT_x)
Register #:
Port0: 041Dh
Port1: 081Dh
Port2: 0C1Dh
Size:
32 bits
This register provides a counter of received packets of less than 64 bytes and a FCS error. The counter
is cleared upon being read.
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
RX Fragment
Count of packets that have less than 64 bytes and a FCS error.
RC
00000000h
Note:
This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 115 hours.
Revision 1.2 (04-08-08)
338
SMSC LAN9312
DATASHEET
SMSC [ SMSC CORPORATION ]
