High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
14.5.2.15 Port x MAC Receive Pause Frame Count Register (MAC_RX_PAUSE_CNT_x)
Register #:
Port0: 041Ch
Port1: 081Ch
Port2: 0C1Ch
Size:
32 bits
This register provides a counter of valid received pause frame packets. The counter is cleared upon
being read.
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
RX Pause Frame
RC
00000000h
Count of valid packets (proper length and free of errors) that have a type
field of 8808h and an op-code of 0001(Pause).
Note:
This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 481 hours.
Note: A bad packet is one that has a FCS or Symbol error.
SMSC LAN9312
337
Revision 1.2 (04-08-08)
DATASHEET
SMSC [ SMSC CORPORATION ]
