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LAN9210 参数 Datasheet PDF下载

LAN9210图片预览
型号: LAN9210
PDF下载: 下载PDF文件 查看货源
内容描述: 外形小巧单芯片以太网控制器与HP Auto-MDIX的 [Small Form Factor Single- Chip Ethernet Controller with HP Auto-MDIX]
分类和应用: 控制器以太网
文件页数/大小: 458 页 / 4618 K
品牌: SMSC [ SMSC CORPORATION ]
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High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface  
Datasheet  
14.2.8.6  
Virtual PHY Auto-Negotiation Link Partner Base Page Ability Register (VPHY_AN_LP_BASE_ABILITY)  
Offset:  
Index (decimal):  
1D4h  
5
Size:  
32 bits  
This read-only register contains the advertised ability of the link partner’s PHY and is used in the Auto-  
Negotiation process with the Virtual PHY. Because the Virtual PHY does not physically connect to an  
actual link partner, the values in this register are emulated as described below.  
BITS  
DESCRIPTION  
TYPE  
DEFAULT  
31:16  
RESERVED  
(See Note 14.33)  
RO  
-
15  
14  
13  
Next Page  
RO  
RO  
RO  
0b  
This bit indicates the emulated link partner PHY next page capability and is  
always 0.  
Note 14.34  
0: Link partner PHY does not advertise next page capability  
1: Link partner PHY advertises next page capability  
Acknowledge  
1b  
This bit indicates whether the link code word has been received from the  
partner and is always 1.  
Note 14.34  
0: Link code word not yet received from partner  
1: Link code word received from partner  
Remote Fault  
0b  
Since there is no physical link partner, this bit is not used and is always  
returned as 0.  
Note 14.34  
12  
11  
RESERVED  
RO  
RO  
-
Asymmetric Pause  
This bit indicates the emulated link partner PHY asymmetric pause  
capability.  
Note 14.35  
0: No Asymmetric PAUSE toward link partner  
1: Asymmetric PAUSE toward link partner  
10  
9
Pause  
RO  
RO  
Note 14.35  
This bit indicates the emulated link partner PHY symmetric pause capability.  
0: No Symmetric PAUSE toward link partner  
1: Symmetric PAUSE toward link partner  
100BASE-T4  
0b  
This bit indicates the emulated link partner PHY 100BASE-T4 capability.  
This bit is always 0.  
Note 14.34  
0: 100BASE-T4 ability not supported  
1: 100BASE-T4 ability supported  
8
100BASE-X Full Duplex  
This bit indicates the emulated link partner PHY 100BASE-X full duplex  
capability.  
RO  
Note 14.36  
0: 100BASE-X full duplex ability not supported  
1: 100BASE-X full duplex ability supported  
Revision 1.2 (04-08-08)  
254  
SMSC LAN9312  
DATASHEET  
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