High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
Table 14.1 System Control and Status Registers (continued)
ADDRESS
OFFSET
SYMBOL
REGISTER NAME
FREE_RUN
RX_DROP
09Ch
0A0h
Free Running Counter Register, Section 14.2.9.7
Host MAC RX Dropped Frames Counter Register,
Section 14.2.2.6
MAC_CSR_CMD
PMI_DATA
0A4h
Host MAC CSR Interface Command Register,
Section 14.2.2.7
0A4h
EEPROM
Loader
PHY Management Interface Data Register (EEPROM
Loader Access Only), Section 14.2.7.1
Access Only
MAC_CSR_DATA
PMI_ACCESS
0A8h
Host MAC CSR Interface Data Register, Section 14.2.2.8
0A8h
EEPROM
Loader
PHY Management Interface Access Register (EEPROM
Loader Access Only), Section 14.2.7.2
Access Only
AFC_CFG
0ACh
Host MAC Automatic Flow Control Configuration Register,
Section 14.2.2.9
RESERVED
0B0h - 0FCh
100h
Reserved for Future Use
1588_CLOCK_HI_RX_CAPTURE_1
Port 1 1588 Clock High-DWORD Receive Capture
Register, Section 14.2.5.1
1588_CLOCK_LO_RX_CAPTURE_1
1588_SEQ_ID_SRC_UUID_HI_RX_CAPTURE_1
1588_SRC_UUID_LO_RX_CAPTURE_1
1588_CLOCK_HI_TX_CAPTURE_1
104h
108h
10Ch
110h
114h
118h
11C
Port 1 1588 Clock Low-DWORD Receive Capture Register,
Section 14.2.5.2
Port 1 1588 Sequence ID, Source UUID High-WORD
Receive Capture Register, Section 14.2.5.3
Port 1 1588 Source UUID Low-DWORD Receive Capture
Register, Section 14.2.5.4
Port 1 1588 Clock High-DWORD Transmit Capture
Register, Section 14.2.5.5
1588_CLOCK_LO_TX_CAPTURE_1
Port 1 1588 Clock Low-DWORD Transmit Capture
Register, Section 14.2.5.6
1588_SEQ_ID_SRC_UUID_HI_TX_CAPTURE_1
1588_SRC_UUID_LO_TX_CAPTURE_1
1588_CLOCK_HI_RX_CAPTURE_2
Port 1 1588 Sequence ID, Source UUID High-WORD
Transmit Capture Register, Section 14.2.5.7
Port 1 1588 Source UUID Low-DWORD Transmit Capture
Register, Section 14.2.5.8
120h
124h
128h
12Ch
130h
134h
138h
Port 2 1588 Clock High-DWORD Receive Capture
Register, Section 14.2.5.1
1588_CLOCK_LO_RX_CAPTURE_2
Port 2 1588 Clock Low-DWORD Receive Capture Register,
Section 14.2.5.2
1588_SEQ_ID_SRC_UUID_HI_RX_CAPTURE_2
1588_SRC_UUID_LO_RX_CAPTURE_2
1588_CLOCK_HI_TX_CAPTURE_2
Port 2 1588 Sequence ID, Source UUID High-WORD
Receive Capture Register, Section 14.2.5.3
Port 2 1588 Source UUID Low-DWORD Receive Capture
Register, Section 14.2.5.4
Port 2 1588 Clock High-DWORD Transmit Capture
Register, Section 14.2.5.5
1588_CLOCK_LO_TX_CAPTURE_2
Port 2 1588 Clock Low-DWORD Transmit Capture
Register, Section 14.2.5.6
1588_SEQ_ID_SRC_UUID_HI_TX_CAPTURE_2
Port 2 1588 Sequence ID, Source UUID High-WORD
Transmit Capture Register, Section 14.2.5.7
SMSC LAN9312
169
Revision 1.2 (04-08-08)
DATASHEET
SMSC [ SMSC CORPORATION ]
