High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
17-Bytes of payload data
16-Byte “Buffer End Alignment”
Figure 9.5 illustrates the TX command structure for this example, and also shows how data is passed
to the TX Data FIFO.
Data Written to the
Memory Mapped
TX Data FIFO Port
31
0
TX Command 'A'
Buffer End Alignment = 1
Data Start Offset = 7
First Segment = 1
Last Segment = 0
Buffer Size = 79
TX Command 'A'
TX Command 'B'
Data Passed to the
TX Data FIFO
7-Byte Data Start Offset
TX Command 'A'
TX Command 'B'
TX Command 'B'
Packet Length = 111
79-Byte Payload
Pad DWORD 1
79-Byte Payload
10-Byte
End Padding
TX Command 'A'
15-Byte Payload
31
0
TX Command 'A'
Buffer End Alignment = 1
Data Start Offset = 0
First Segment = 0
Last Segment = 0
Buffer Size = 15
TX Command 'A'
TX Command 'B'
TX Command 'A'
17-Byte Payload
15-Byte Payload
1B
TX Command 'B'
Packet Length = 111
31
0
10-Byte
End Offset Padding
TX Command 'A'
TX Command 'A'
Buffer End Alignment = 1
Data Start Offset = 10
First Segment = 0
Last Segment = 1
Buffer Size = 17
TX Command 'B'
10-Byte
Data Start Offset
NOTE: Extra bytes
between buffers are
not transmitted
TX Command 'B'
Packet Length = 111
17-Byte Payload Data
5-Byte End Padding
Figure 9.5 TX Example 1
SMSC LAN9312
129
Revision 1.2 (04-08-08)
DATASHEET