FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications
DATA STRUCTURES AND REGISTERS
PACKET FORMAT IN BUFFER MEMORY
The packet format in memory is similar for the Transmit and Receive areas. The first word is reserved for the status word.
The next word is used to specify the total number of bytes, and it is followed by the data area. The data area holds the
packet itself.
bit0
bit15
2nd Byte
RAM
OFFSET
1st Byte
(DECIMAL)
0
STATUS WORD
2
4
BYTE COUNT (always even)
RESERVED
DATA AREA
2046 Max
LAST DATA BYTE (if odd)
CONTROL BYTE
Last Byte
FIGURE 5 - DATA PACKET FORMAT
TRANSMIT PACKET
RECEIVE PACKET
STATUS WORD
Written by CSMA upon transmit
completion (see Status Register)
Written by CSMA upon receive
completion (see RX Frame
Status Word)
BYTE COUNT
DATA AREA
Written by CPU
Written/modified by CPU
Written by CSMA
Written by CSMA
CONTROL BYTE
Written by CPU to control
odd/even data bytes
Written by CSMA; also has
odd/even bit
BYTE COUNT - Divided by two, it defines the total number of words including the STATUS WORD, the BYTE
COUNT WORD, the DATA AREA and the CONTROL BYTE.
The receive byte count always appears as even; the ODDFRM bit of the receive status word indicates if the low byte of
the last word is relevant.
SMSC DS – LAN91C110 REV. B
Page 13
Rev. 09/05/02
SMSC [ SMSC CORPORATION ]
