10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
9.6
Register 16. Configuration 1- Structure and Bit Definition
LNKDIS
XMTDIS
XMTPDN
Reserved
Reserved
BYPSCR
UNSCDS
EQLZR
RW
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
0
CABLE
RW
RLVL0
RW
0
TLVL3
RW
1
TLVL2
RW
0
TLVL1
RW
0
TLVL0
RW
0
TRF1
RW
1
TRF0
RW
0
0
LNKDIS:
Link Disable
1 = Receive Link
Detect Function
Disabled (Force Link
Pass)
0 = Normal
XMTDIS:
TP Transmit
TP Transmit
1 = TP Transmitter
Disabled
0 = Normal
XMTPDN:
1 = TP Transmitter
Powered Down
Powerdown
0 = Normal
RESERVED:
RESERVED
Reserved, Must be 0
for Proper Operation
BYPSCR:
Bypass
1 = Bypass
Scrambler/Descram
bler
Scrambler/Descr-
ambler Select
0 = No Bypass
UNSCDS:
Unscrambled Idle
1 = Disable
AutoNegotiation with
devices that transmit
unscrambled
Reception Disable
idle on powerup and
various instances
0 = Enables
AutoNegotiation with
devices that transmit
unscrambled idle on
powerup and various
instances
EQLZR:
Receive Equalizer
1 = Receive
Equalizer Disabled,
Set To 0 Length
SMSC LAN91C111-REV B
Revision 1.8 (07-13-05)
DATA8S9HEET
SMSC [ SMSC CORPORATION ]
