10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
DUPLEX
MODE
AUTO-
CONTROL
FOR THE
MAC
WHAT DO YOU
WANT TO DO?
NEGOTIATION
CONTROL BITS
SPEED AND DUPLEX MODE CONTROL
FOR THE PHY
10 Full Duplex
0
0
1
0
0
1
0
1
0
0
1
0
0
0
X
0
0
X
1
1
X
0
0
X
X
X
0
X
X
1
1
1
1
0
0
0
10 Half Duplex
X
X
0
X
X
0
LS2A, LS1A, LS0A – LED select Signal Enable. These bits define what LED control signals are routed
to the LEDA output pin on the LAN91C111 Ethernet Controller. The default is 10/100 Link detected.
LS2A LS1A LS0A LED SELECT SIGNAL – LEDA
0
0
0
nPLED3+ nPLED0 – Logical OR of 100Mbps Link detected 10Mbps Link detected
(default)
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
Reserved
nPLED0 - 10Mbps Link detected
nPLED1 - Full Duplex Mode enabled
nPLED2 - Transmit or Receive packet occurred
nPLED3 - 100Mbps Link detected
nPLED4 - Receive packet occurred
nPLED5 - Transmit packet occurred
LS2B, LS1B, LS0B – LED select Signal Enable. These bits define what LED control signals are routed
to the LEDB output pin on the LAN91C111 Ethernet Controller. The default is 10/100 Link detected.
LS2B LS1B LS0B LED SELECT SIGNAL – LEDB
0
0
0
nPLED3+ nPLED0 – Logical OR of 100Mbps Link detected 10Mbps Link detected
(default)
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
Reserved
nPLED0 - 10Mbps Link detected
nPLED1 – Full Duplex Mode enabled
nPLED2 – Transmit or Receive packet occurred
nPLED3 - 100Mbps Link detected
nPLED4 - Receive packet occurred
nPLED5 - Transmit packet occurred
SMSC LAN91C111-REV B
Revision 1.8 (07-13-05)
DATA6S3HEET