10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Register) and determine the duplex mode. When this bit is set (1), the Internal PHY will operate at
full duplex mode. When this bit is cleared (0), the Internal PHY will operate at half Duplex mode. When
the ANEG bit = 1, this bit is ignored and duplex mode is determined by the outcome of the Auto-
negotiation or this bit is overridden by the DPLX bit in the PHY Register 0 (Control Register) when the
ANEG_EN bit in the PHY Register 0 (Control Register) is clear.
ANEG – Auto-Negotiation mode select - The PHY is placed in Auto-Negotiation mode when the ANEG
bit and the ANEG_EN bit in PHY Register 0 (Control Register) both are set. When either of these bits
is cleared (0), the PHY is placed in manual mode.
DUPLEX
MODE
AUTO-
CONTROL
FOR THE
MAC
WHAT DO YOU
WANT TO DO?
NEGOTIATION
CONTROL BITS
AUTO-NEGOTIATION ADVERTISEMENT
REGISTER
Try to Auto-Negotiate
ANEG
Bit
ANEG_E
TX_FDX
Bit
TX_HDX
Bit
10_FDX
Bit
10_HDX
Bit
SWFDUP
Bit
to ……
N
Bit
RPCR Register 0
Register
4
Register
4
Register
4
Register
4
Transmit
Control
Register
(MAC)
(MAC
)
(PHY)
(PHY)
(PHY)
(PHY)
(PHY)
100 Full Duplex
100 Half Duplex
10 Full Duplex
10 Half Duplex
1
1
1
1
1
1
1
1
1
0
0
0
1
1
0
0
1
1
1
0
1
1
1
1
1
0
1
0
DUPLEX
MODE
AUTO-
CONTROL
FOR THE
MAC
WHAT DO YOU
WANT TO DO?
NEGOTIATION
CONTROL BITS
SPEED AND DUPLEX MODE CONTROL
FOR THE PHY
Try to Manually Set to
ANEG
Bit
ANEG_E
SPEED
Bit
DPLX
Bit
SPEED
Bit
DPLX
Bit
SWFDUP
Bit
……
N
Bit
RPCR Register 0
RPCR
(MAC
RPCR
(MAC
Register
0
Register
0
Transmit
Control
Register
(MAC)
(MAC
Bank
0
(PHY)
Bank 0
Offset A)
Bank 0
Offset A)
(PHY)
(PHY)
Offset
A)
100 Full Duplex
100 Half Duplex
0
0
1
0
0
1
0
1
0
0
1
0
1
1
X
1
1
X
1
1
X
0
0
X
X
X
1
X
X
1
1
1
1
0
0
0
X
X
1
X
X
0
Revision 1.8 (07-13-05)
SMSC LAN91C111-REV B
DATA6S2HEET
SMSC [ SMSC CORPORATION ]
