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LAN91C111I-NU 参数 Datasheet PDF下载

LAN91C111I-NU图片预览
型号: LAN91C111I-NU
PDF下载: 下载PDF文件 查看货源
内容描述: 10/100非PCI以太网单芯片MAC + PHY [10/100 Non-PCI Ethernet Single Chip MAC + PHY]
分类和应用: PC以太网局域网(LAN)标准
文件页数/大小: 142 页 / 1664 K
品牌: SMSC [ SMSC CORPORATION ]
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10/100 Non-PCI Ethernet Single Chip MAC + PHY  
Datasheet  
Chapter 6 Signal Description Parameters  
This section provides a detailed description of each SMSC LAN91C111 signal. The signals are  
arranged in functional groups according to their associated function.  
The ‘n’ symbol at the beginning of a signal name indicates that it is an active low signal. When ‘n’ is  
not present before the signal name, it indicates an active high signal.  
The term “assert” or “assertion” indicates that a signal is active; independent of whether that level is  
represented by a high or low voltage. The term negates or negation indicates that a signal is inactive.  
The term High-Z means tri-stated.  
The term Undefined means the signal could be high, low, tri-stated, or in some in-between level.  
6.1  
Buffer Types  
O4  
Output buffer with 2mA source and 4mA sink  
Output buffer with 6mA source and 12mA sink  
Output buffer with 8mA source and 16mA sink  
Output buffer with 12mA source and 24mA sink  
Open drain buffer with 16mA sink  
O12  
O16  
O24  
OD16  
OD24  
I/O4  
I/O24  
I/OD  
I
Open drain buffer with 24mA sink  
Bidirectional buffer with 2mA source and 4mA sink  
Bidirectional buffer with 12mA source and 24mA sink  
Bidirectional Open drain buffer with 4mA sink  
Input buffer  
IS  
Input buffer with Schmitt Trigger Hysteresis  
Clock input buffer  
Iclk  
I/O  
Differential Input  
O/I  
Differential Output  
**  
5V tolerant. Input pins are able to accept 5V signals  
DC levels and conditions defined in the DC Electrical Characteristics section  
SMSC LAN91C111-REV B  
Revision 1.8 (07-13-05)  
DATA2S7HEET