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LAN91C111I-NU 参数 Datasheet PDF下载

LAN91C111I-NU图片预览
型号: LAN91C111I-NU
PDF下载: 下载PDF文件 查看货源
内容描述: 10/100非PCI以太网单芯片MAC + PHY [10/100 Non-PCI Ethernet Single Chip MAC + PHY]
分类和应用: PC以太网局域网(LAN)标准
文件页数/大小: 142 页 / 1664 K
品牌: SMSC [ SMSC CORPORATION ]
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10/100 Non-PCI Ethernet Single Chip MAC + PHY  
Datasheet  
PIN NO.  
NAME  
BUFFER  
TYPE  
SYMBOL  
DESCRIPTION  
TQFP  
QFP  
9
11  
EEPROM Clock EESK  
O4  
O4  
Output. 4 µsec clock used to shift data in  
and out of the serial EEPROM.  
10  
12  
EEPROM  
Select  
EECS  
Output. Serial EEPROM chip select.  
Used for selection and command framing  
of the serial EEPROM.  
7
9
EEPROM Data EEDO  
Out  
O4  
Output. Connected to the DI input of the  
serial EEPROM.  
8
10  
5-7  
EEPROM Data EEDI  
In  
I with  
Input. Connected to the DO output of the  
pulldown ** serial EEPROM.  
3-5  
I/O Base  
IOS0-IOS2 I with  
Input. External switches can be  
pullup**  
connected to these lines to select  
between predefined EEPROM  
configurations.  
6
8
Enable  
ENEEP  
I with  
Input. Enables (when high or open)  
LAN91C111 accesses to the serial  
EEPROM. Must be grounded if no  
EEPROM is connected to the  
LAN91C111.  
EEPROM  
pullup**  
127, 128  
1, 2  
Crystal 1  
Crystal 2  
XTAL1  
XTAL2  
Iclk**  
An external 25 MHz crystal is connected  
across these pins. If a TTL clock is  
supplied instead, it should be connected  
to XTAL1 and XTAL2 should be left open.  
XTAL1 is the 5V tolerant input of the  
internal amplifier and XTAL2 is the output  
of the internal amplifier.  
1, 33, 44,  
3, 35, 46,  
Power  
VDD  
+3.3V Power supply pins.  
62, 77, 98, 64, 79,  
110, 120  
100, 112,  
122  
11, 16  
13, 18  
Analog Power  
AVDD  
GND  
+3.3V Analog power supply pins.  
Ground pins.  
24, 39, 52, 26, 41, 54, Ground  
57, 67, 72, 59, 69, 74,  
93, 103,  
108, 117  
95, 105,  
110, 119  
13, 19  
21  
15, 21  
23  
Analog Ground AGND  
Analog Ground pins  
Loopback  
LBK  
O4  
Output. Active when LOOP bit is set  
(TCR bit 1).  
20  
22  
nLink Status  
nLNK  
I with  
Input. General-purpose input port used to  
convey LINK status (EPHSR bit 14).  
pullup  
28  
30  
nCNTRL  
X25out  
nCNTRL  
X25out  
O12  
O12  
O12  
General Purpose Control Pin  
25Mhz Output to external PHY  
47  
49  
111  
113  
Transmit Enable TXEN100  
100 Mbps  
Output to MII PHY. Envelope to 100  
Mbps transmission.  
119  
121  
Carrier Sense  
100 Mbps  
CRS100  
I with  
Input from MII PHY. Envelope of packet  
reception used for deferral and backoff  
purposes.  
pulldown  
SMSC LAN91C111-REV B  
Revision 1.8 (07-13-05)  
DATA2S5HEET  
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