Table 3 - VL Local Bus Signal Connections
LAN91C100
SIGNAL
VL BUS
SIGNAL
NOTES
LCLK
LCLK
Local Bus Clock. Rising edges used for synchronous bus
interface transactions.
nRESET
RESET
Connected via inverter to the LAN91C100.
nBE0 nBE1
nBE2 nBE3
nBE0 nBE1
nBE2 nBE3
Byte enables. Latched transparently by nADS rising edge.
nADS
nADS, nCYCLE
INTR0-INTR3
D0-D31
Address Strobe is connected directly to the VL bus. nCYCLE
is created typically by using nADS delayed by one LCLK.
IRQn
Typically uses the interrupt lines on the ISA edge connector
of VL bus.
D0-D31
32 bit data bus. The bus byte(s) used to access the device
are a function of nBE0-nBE3:
BE0
BE1 nBE BE3
2
0
0
1
0
1
1
1
0
0
1
1
0
1
1
0
1
0
1
1
0
1
0
1
0
1
1
1
0
Double word access
Low word access
High word access
Byte 0 access
Byte 1 access
Byte 2 access
Byte 3 access
n
Not used = tri-state on reads, ignored on writes. Note that
nBE2 and nBE3 override the value of A1, which is tied low
in this application.
nLDEV
nLDEV
nLDEV is a totem pole output. nLDEV is active on valid
decodes of A15-A4 and AEN=0.
UNUSED PINS
VCC
GND
nRD, nWR
A1, nVLBUS
nDATACS
OPEN
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