I/O SPACE - BANK1
OFFSET
NAME
TYPE
SYMBOL
BAR
2
BASE ADDRESS REGISTER
READ/WRITE
This register holds the I/O address decode option chosen for the LAN91C100. It is part of the
EEPROM saved setup, and is not usually modified during run-time.
HIGH
BYTE
A15
0
A14
0
A13
0
A9
1
A8
1
A7
0
A6
0
A5
0
LOW
RESERVED
BYTE
0
0
0
0
0
0
0
X
A15-A13 and A9-A5 These bits are compared
against the I/O address on the bus to determine
the IOBASE for the LAN91C100's registers. The
64k I/O space is fully decoded by the
LAN91C100 down to a 16 location space,
therefore, the unspecified address lines A4, A10,
A11 and A12 must be all zeros.
All bits in this register are loaded from the serial
EEPROM. The I/O base decode defaults to
300h (namely, the high byte defaults to 18h).
31
SMSC [ SMSC CORPORATION ]
