High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Chapter 5 Register Description
The following section describes all LAN9118 registers and data ports.
FCh
RESERVED
B4h
EEPROMPort
B0h
ACh
A8h
MACCSRPort
A4h
A0h
50h
4Ch
48h
44h
40h
3Ch
TX Status FIFO PEEK
TX Status FIFO Port
RX Status FIFO PEEK
RX Status FIFO Port
TX Data FIFO Alias Ports
TX Data FIFO Port
24h
20h
1Ch
RX Data FIFO Alias Ports
04h
00h
Base
+
RX Data FIFO Port
Figure 5.1 LAN9118 Memory Map
SMSC LAN9118
Revision 1.3 (05-31-07)
DATA6S7HEET