High Performance Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
5.3.16
GPT_CNT-General Purpose Timer Current Count Register
Offset:
90h
Size:
32 bits
This register reflects the current value of the GP Timer.
BITS
31-16
15-0
DESCRIPTION
Reserved
TYPE
RO
DEFAULT
-
General Purpose Timer Current Count (GPT_CNT). This 16-bit field
RO
FFFFh
reflects the current value of the GP Timer.
5.3.17
ENDIAN—Endian Control
Offset:
98h
Size:
32 bits
This register controls the Endianess of the LAN9117.
BITS
DESCRIPTION
TYPE
DEFAULT
31:0
Endian. If this field is set to 0xFFFFFFFFh, the LAN9117 is configured to
operate with most host big-endian processors using a 16-bit interface. If this
field is set to anything else, the LAN9117 is configured to operate with native
16-bit Little-Endian processors.
R/W
00000000h
NASR
Notes:
■ Please refer to Section 3.6.1, "Bus Writes" for additional information.
■ The value of this field is only significant when configured for 16-bit
operation.
SMSC LAN9117
Revision 1.1 (05-17-05)
DATA8S9HEET
SMSC [ SMSC CORPORATION ]
