Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Chapter 2 Pin Description and Configuration
NC
GND_CORE
VREG
VDD_CORE
VSS_PLL
XTAL2
XTAL1
VDD_PLL
VDD_REF
ATEST
RBIAS
VSS_REF
A7
1
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
SPEED_SEL
NC
2
3
IRQ
4
NC
5
PME
6
EECLK**
EECS
EEDIO**
GND_CORE
VDD_CORE
D0
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
SMSC
D1
D2
VDD_IO
GND_IO
D3
D4
D5
D6
VDD_IO
GND_IO
D7
D8
D9
A6
LAN9116
A5
A4
A3
100 PIN TQFP
A2
A1
GND_IO
VDD_IO
D31
D30
D29
D28
D27
**Denotes a multifunction pin
*1 This NC pin can also be tied to VDD_A for backward compatibility
*2 This NC pin can also be tied to VSS_A for backward compatibility
Figure 2.1 Pin Configuration
Revision 1.1 (05-17-05)
SMSC LAN9116
DATA1S4HEET
SMSC [ SMSC CORPORATION ]
