±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support and flexPWR® Technology in a Small Footprint
Datasheet
Table 5.43 Register 29 - Interrupt Source Flags (continued)
ADDRESS
NAME
DESCRIPTION
MODE DEFAULT
29.6
INT6
1 = Auto-Negotiation complete
RO/
LH
X
X
X
X
X
X
0
0 = not source of interrupt
29.5
29.4
29.3
29.2
29.1
29.0
INT5
INT4
1 = Remote Fault Detected
0 = not source of interrupt
RO/
LH
1 = Link Down (link status negated)
0 = not source of interrupt
RO/
LH
INT3
1 = Auto-Negotiation LP Acknowledge
0 = not source of interrupt
RO/
LH
INT2
1 = Parallel Detection Fault
0 = not source of interrupt
RO/
LH
INT1
1 = Auto-Negotiation Page Received
0 = not source of interrupt
RO/
LH
Reserved
Ignore on read.
RO/
LH
Table 5.44 Register 30 - Interrupt Mask
ADDRESS
NAME
DESCRIPTION
MODE DEFAULT
30.15:8
30.7:1
Reserved
Mask Bits
Write as 0; ignore on read.
RO
0
0
1 = interrupt source is enabled
0 = interrupt source is masked
RW
30.0
Reserved
Write as 0; ignore on read
RO
0
Table 5.45 Register 31 - PHY Special Control/Status
ADDRESS
NAME
DESCRIPTION
MODE DEFAULT
31.15:13
31.12
Reserved
Autodone
Write as 0, ignore on read.
RW
RO
0
0
Auto-negotiation done indication:
0 = Auto-negotiation is not done or disabled (or not
active)
1 = Auto-negotiation is done
Note:
This is a duplicate of register 1.5, however
reads to register 31 do not clear status bits.
31.11:10
31.9:7
31.6
Reserved
Reserved
Write as 0, ignore on Read.
Write as 0, ignore on Read.
RW
RW
RW
XX
0
Enable 4B5B
0 = Bypass encoder/decoder.
1 = enable 4B5B encoding/decoding.
MAC Interface must be configured in MII mode.
1
31.5
Reserved
Write as 0, ignore on Read.
RW
0
Revision 2.3 (04-12-11)
SMSC LAN8700/LAN8700i
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