High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Datasheet
6.4
Reset Timing
T6.1
nRST
T6.2
T6.3
Configuration
signals
T6.4
Output drive
PARAMETER
DESCRIPTION
Reset Pulse Width
MIN
TYP
MAX
UNITS
NOTES
T6.1
T6.2
100
200
us
ns
Configuration input setup to
nRST rising
T6.3
T6.4
Configuration input hold after
nRST rising
400
20
ns
ns
Output Drive after nRST rising
800
20 clock cycles for
25 MHz clock
6.5
DC Characteristics
6.5.1
Operating Conditions
Supply Voltage
+3.3V +/- 10%
0°C to 70°C
Operating Temperature
6.5.2
Power Consumption
6.5.2.1
Power Consumption Device Only
Power measurements taken under the following conditions:
Temperature:
Device VDD:
+25° C
+3.30 V
Rev. 0.6 (12-12-03)
SMSC LAN83C185
DATA5S0HEET