High Performance Single Chip Low Power 10/100 Ethernet Physical Layer Transceiver (PHY)
Datasheet
6.2
100Base-TX Timings
6.2.1
100M MII Receive Timing
RX_CLK
RXD[3:0]
RX_DV
RX_ER
Valid Data
T2.1
T2.2
PARAMETER
DESCRIPTION
MIN
TYP
MAX
UNITS
NOTES
T2.1
Receive signals setup to RX_CLK
rising
10
ns
T2.2
Receive signals hold from
RX_CLK rising
10
ns
RX_CLK frequency
RX_CLK Duty-Cycle
25
40
MHz
%
6.2.2
100M MII Transmit Timing
TX_CLK
TXD[3:0]
TX_EN
TX_ER
Valid Data
T3.1
T3.2
PARAMETER
DESCRIPTION
MIN
12
TYP
MAX
UNITS
NOTES
T3.1
Transmit signals setup to TX_CLK
rising
ns
T3.2
Transmit signals hold after
TX_CLK rising
0
ns
TX_CLK frequency
TX_CLK Duty-Cycle
25
40
MHz
%
Rev. 0.6 (12-12-03)
SMSC LAN83C185
DATA4S8HEET
SMSC [ SMSC CORPORATION ]
