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LAN7500-ABZJ 参数 Datasheet PDF下载

LAN7500-ABZJ图片预览
型号: LAN7500-ABZJ
PDF下载: 下载PDF文件 查看货源
内容描述: [Serial I/O Controller, 0 Channel(s), 60MBps, CMOS, 8 X 8 MM, ROHS COMPLIANT, QFN-56]
分类和应用: 通信时钟数据传输外围集成电路
文件页数/大小: 56 页 / 616 K
品牌: SMSC [ SMSC CORPORATION ]
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Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller  
Datasheet  
7.6  
Clock Circuit  
The device can accept either a 25MHz crystal (preferred) or a 25MHz single-ended clock oscillator (+/-  
50ppm) input. If the single-ended clock oscillator method is implemented, XO should be left  
unconnected and XI should be driven with a nominal 0-3.3V clock signal. The input clock duty cycle  
is 40% minimum, 50% typical and 60% maximum.  
It is recommended that a crystal utilizing matching parallel load capacitors be used for the crystal  
input/output signals (XI/XO). See Table 7.20 for the recommended crystal specifications.  
Table 7.20 LAN7500/LAN7500i Crystal Specifications  
PARAMETER  
SYMBOL  
MIN  
NOM  
AT, typ  
Fundamental Mode  
Parallel Resonant Mode  
MAX  
UNITS  
NOTES  
Crystal Cut  
Crystal Oscillation Mode  
Crystal Calibration Mode  
Frequency  
Ffund  
Ftol  
-
25.000  
-
MHz  
PPM  
PPM  
PPM  
PPM  
pF  
Frequency Tolerance @ 25oC  
Frequency Stability Over Temp  
Frequency Deviation Over Time  
Total Allowable PPM Budget  
Shunt Capacitance  
-
-
+/-50  
Note 7.15  
Note 7.15  
Note 7.16  
Note 7.17  
Ftemp  
Fage  
-
-
+/-50  
-
+/-3 to 5  
-
-
-
+/-50  
CO  
CL  
-
7 typ  
-
Load Capacitance  
-
20 typ  
-
pF  
Drive Level  
PW  
R1  
300  
-
-
uW  
Equivalent Series Resistance  
Operating Temperature Range  
-
-
-
50  
Ohm  
oC  
Note 7.18  
-
Note 7.19  
-
LAN7500/LAN7500i XI Pin  
Capacitance  
3 typ  
pF  
Note 7.20  
Note 7.20  
LAN7500/LAN7500i XO Pin  
Capacitance  
-
3 typ  
-
pF  
Note 7.15 The maximum allowable values for Frequency Tolerance and Frequency Stability are  
application dependant. Since any particular application must meet the IEEE +/-50 PPM  
Total PPM Budget, the combination of these two values must be approximately +/-45 PPM  
(allowing for aging).  
Note 7.16 Frequency Deviation Over Time is also referred to as Aging.  
Note 7.17 The total deviation for the Transmitter Clock Frequency is specified by IEEE 802.3u as  
+/- 50 PPM.  
Note 7.18 0oC for commercial version, -40oC for industrial version.  
Note 7.19 +70oC for commercial version, +85oC for industrial version.  
Note 7.20 This number includes the pad, the bond wire and the lead frame. PCB capacitance is not  
included in this value. The XO/XI pin and PCB capacitance values are required to  
accurately calculate the value of the two external load capacitors. These two external load  
capacitors determine the accuracy of the 25.000 MHz frequency.  
SMSC LAN7500/LAN7500i  
Revision 1.0 (11-01-10)  
DATA5S3HEET