Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
Datasheet
7.5.6
JTAG Timing
This section specifies the JTAG timing of the device. Please refer to Section 1.1.10, "TAP Controller,"
on page 9 for additional details.
ttckp
ttckhl
ttckhl
TCK (Input)
tsu
th
TDI, TMS (Inputs)
tdov
tdoinvld
TDO (Output)
Figure 7.6 JTAG Timing
Table 7.19 JTAG Timing Values
SYMBOL
DESCRIPTION
MIN
MAX
UNITS
NOTES
ttckp
ttckhl
tsu
TCK clock period
66.67
ttckp*0.4
10
ns
ns
ns
ns
ns
ns
TCK clock high/low time
ttckp*0.6
TDI, TMS setup to TCK rising edge
TDI, TMS hold from TCK rising edge
TDO output valid from TCK falling edge
TDO output invalid from TCK falling edge
th
10
tdov
16
tdoinvld
0
Revision 1.0 (11-01-10)
SMSC LAN7500/LAN7500i
DATA5S2HEET
SMSC [ SMSC CORPORATION ]
