USB2.0 PHY IC
T0
T1
T2
T3 T4
time
OPMODE 0
OPMODE 1
XCVRSELECT
TERMSELECT
SUSPENDN
TXVALID
CLK60
DP/DM
SE0
J
CLK power up time
Device Chirp K
Look for host chirps
Figure 8.6 HS Detection Handshake Timing Behavior from Suspend
To detect the assertion of the downstream Chirp K's and Chirp J's for 2.5us {TFILT}, the SIE must see
the appropriate LINESTATE signals asserted continuously for 165 CLK60 cycles.
Table 8.8 HS Detection Handshake Timing Values from Suspend
TIMING
PARAMETER
DESCRIPTION
VALUE
0 (HS Reset T0)
T0
While in suspend state an SE0 is detected on the
USB. HS Handshake begins. D+ pull-up enabled, HS
terminations disabled, SUSPENDN negated.
T1
First transition of CLKOUT. CLKOUT "Usable"
(frequency accurate to ±10%, duty cycle accurate to
50±5).
T0 < T1 < T0 + 5.6ms
T2
T3
Device asserts Chirp K on the bus.
T1 < T2 < T0 + 5.8ms
Device removes Chirp K from the bus. (1 ms
T2 + 1.0 ms < T3 < T0 + 7.0 ms
minimum width) and begins looking for host chirps.
T4
CLK "Nominal" (CLKOUT is frequency accurate to
±500 ppm, duty cycle accurate to 50±5).
T1 < T3 < T0 + 20.0ms
SMSC GT3200, SMSC USB3250
Revision 1.3 (10-05-04)
DATA3S6HEET
SMSC [ SMSC CORPORATION ]
