USB2.0 PHY IC
T5
T0
T1
T2
T4
time
T3
OPMODE 0
OPMODE 1
XCVRSELECT
TERMSELECT
TXVALID
DP/DM
SOF
SE0
FS Mode
Device Chirp K
No
Downstream
Facing Port
Chirps
Figure 8.3 HS Detection Handshake Timing Behavior (FS Mode)
Table 8.6 HS Detection Handshake Timing Values (FS Mode)
TIMING
PARAMETER
DESCRIPTION
VALUE
0 (reference)
T0
T1
T2
T3
T4
T5
HS Handshake begins. DP pull-up enabled, HS
terminations disabled.
Device enables HS Transceiver and asserts Chirp
K on the bus.
T0 < T1 < HS Reset T0 + 6.0ms
Device removes Chirp K from the bus. 1ms
minimum width.
T1 + 1.0 ms < T2 < HS Reset
T0 + 7.0ms
Earliest time when downstream facing port may
assert Chirp KJ sequence on the bus.
T2 < T3 < T2+100µs
Chirp not detected by the device. Device reverts to
FS default state and waits for end of reset.
T2 + 1.0ms < T4 < T2 + 2.5ms
HS Reset T0 + 10ms
Earliest time at which host port may end reset
Note 8.1 T0 may occur to 4ms after HS Reset T0.
Note 8.2 The SIE must assert the Chirp K for 66000 CLK60 cycles to ensure a 1ms minimum
duration.
SMSC GT3200, SMSC USB3250
Revision 1.3 (10-05-04)
DATA3S2HEET
SMSC [ SMSC CORPORATION ]
